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  Scopus ID: 21100926589

Development of Rectangular Nanosheet GAA-FET with Underlap

Bhanu Prakash Ellapu and Rudra Sankar Dhar

Abstract

When field effect transistors (FETs) are scaled continuously, short channel effects (SCEs) can be experienced as a result. The main objective of this paper is to analyze the GAA-FET (Gate-all-around field effect transistors) nanowire and design an underlap nanowire device and propose a nanosheet by incorporating three nanowires with underlap. Each device is stimulated, and its performance is observed. This paper investigates the effect of SCEs on the performance of nanowire GAA-FETs, with a focus on minimizing SCEs. SCEs are observed in these devices and note that some parameters are enhanced. The ON-state current is one of the factors that increase the device’s performance as a result of the observed improvements. In nanosheet GAA FETs, the ON-state current is enhanced. In order to achieve a large ON-state current, designing nanowire devices with underlaps on the source and drain is one of the techniques. Three nanowires are employed to design the nanosheet GAA-FET, which consists of bulk and underlapped source/drain regions. The characteristics of all the three devices are investigated and it is seen that the ON-state current in transfer and output characteristics. By including the underlap and bulk on source/drain in the device, the ON-state current is three times higher in the nanosheet GAA-FET. The subthreshold slope varies very little. Additionally, the drain-induced barrier lowering (DIBL) of the developed device is optimized and gives the effective results.

Published on: December 21, 2023
doi: 10.17756/nwj.2023-s5-085
Citation: Ellapu BP, Dhar RS. 2023. Development of Rectangular Nanosheet GAA-FET with Underlap. NanoWorld J 9(S5): S548-S552.

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